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The CPU and the fetch–execute cycle
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Learning objectives
- Explain the purpose of the CPU and the three broad stages of the fetch–execute cycle.
- Describe the roles of the control unit, ALU, cache and registers.
- Distinguish the MAR, MDR, program counter and accumulator by what each stores.
What the CPU does
The central processing unit (CPU) carries out the instructions that make a program work. It repeatedly fetches an instruction from memory, decodes what that instruction means, and executes it. This repeated process is called the fetch–execute cycle.
The control unit (CU) coordinates the cycle. It sends control signals and makes sure that the correct instruction and data move to the correct place. The arithmetic logic unit (ALU) performs arithmetic calculations and logical comparisons. Cache is a small amount of very fast memory close to or inside the CPU; it stores frequently or recently used instructions and data so that the processor does not always have to wait for slower main memory.
Registers in the Von Neumann architecture
Registers are tiny, very fast storage locations inside the CPU. OCR requires four named registers:
- The program counter (PC) stores the address of the next instruction to be fetched.
- The memory address register (MAR) stores the address in memory currently being accessed.
- The memory data register (MDR) stores the data or instruction being transferred to or from memory.
- The accumulator (ACC) stores intermediate arithmetic or logic results.
An address identifies a location. Data is the value or instruction stored at that location. Confusing these two is a common source of lost marks.
A safe level of detail for J277
Students need to know what happens at each broad stage and the purposes of the components and registers. They do not need to memorise every bus transfer between every register. A secure answer is accurate about the role of each named component without inventing unnecessary detail.
Worked example: Following one instruction
The PC contains 204. The instruction stored at memory address 204 is `ADD 7`.
- During fetch, the address 204 is used to access memory. The instruction is brought into the CPU and the PC is updated to the address of the following instruction.
- During decode, the control unit recognises that the instruction means “add 7”.
- During execute, the ALU performs the addition and the result may be held in the accumulator.
The important distinction is that 204 is an address, while ADD 7 is the instruction stored at that address.
Build the fetch–execute cycle
Place fetch, decode and execute in order, then match each register to the information it stores.
1. Fetch
Retrieve the next instruction from memory.
2. Decode
Work out what the instruction means.
3. Execute
Carry out the operation.
Check the register matches
PC → next instruction address · MAR → address currently accessed · MDR → transferred data/instruction · Accumulator → intermediate result.
Key vocabulary
- CPU
- The processor that fetches, decodes and executes instructions.
- Fetch
- Retrieve the next instruction from memory.
- Decode
- Work out what operation the instruction represents.
- Execute
- Carry out the operation.
- Register
- A very small, fast storage location inside the CPU.
- Address
- A number that identifies a memory location.
- Control unit
- The CPU component that coordinates operations and sends control signals.
- ALU
- The CPU component that performs arithmetic and logical operations.
Knowledge check
Match each CPU component to its main role.
Put the three broad stages of the CPU cycle in order.
Which statement correctly distinguishes the MAR and MDR?
Exam practice · 6 marks
A processor is running a navigation program. Describe the fetch–execute cycle and explain the role of two named CPU registers during the cycle.
Show mark scheme and model answer
Mark scheme
- Fetches the next instruction from memory.
- Decodes the instruction.
- Executes/carries out the instruction.
- One mark for a correctly named register with an accurate role, e.g. PC stores the address of the next instruction.
- One mark for a second correctly named register with an accurate role, e.g. MAR stores the address being accessed or MDR stores transferred data/instruction.
- One further linked detail, such as the CU coordinating the stages or the ALU carrying out arithmetic/logic during execution.
Model answer: The CPU repeatedly fetches the next instruction from memory, the control unit decodes it, and the required operation is executed. The program counter stores the address of the next instruction to fetch. The MAR stores the address in memory currently being accessed, while the MDR can hold the instruction or data transferred from that location. The control unit coordinates the process and the ALU performs arithmetic or logical work when required.
Flashcards
What does the program counter store?
The address of the next instruction to be fetched.
What does the MAR store?
The address of the memory location currently being accessed.
What does the MDR store?
Data or an instruction being transferred to or from memory.
What are the three broad stages of the CPU cycle?
Fetch, decode and execute.
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